The uMCP storage chip is developed for smart terminals such as smartphones, integrating UFS3.1 and LPDDR5X. It can save about 55% motherboard‑space compared with discrete‑component solutions and realize more flexible design for smartphone systems.
Scope Of Application：Smartphones, network communication products, tablets
| Item | Specification |
| Interface | UFS 3.1 + LPDDR5X |
| Package | 254 Balls |
| Dimension | 11.5 × 13.0 × 1.2 mm（max） |
| Capacity | 最高 8GB（内存）+ 256GB（存储） |
| Max Sequential Read Speed | 2100 MB/s |
| Max Sequential Write Speed | 1800 MB/s |
| LPDDR5 Frequency | 6400 Mbps |
| Operating Voltage | UFS3.1：VCC = 2.4V–2.7V, VCCQ = 1.14V–1.26V； LPDDR5： – VDD1 = 1.70–1.95V; 1.8V NOM – VDD2H = 1.01–1.12V; 1.05V NOM – VDD2L = VDD2H or 0.87–0.97V; 0.9V NOM – VDDQ = 0.5V NOM or 0.3V NOM (ODT off) |
| Operating Temperature | 25℃ ~ +85℃ |
Product type: uMCP Multi‑Chip Packaging Storage
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